The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...

Semidynamics has announced a customisable vector unit for RISC-V processor cores, compliant with RISC-V vector specification 1.0. Vector unit are composed of several vector cores that perform multiple ...

Imperas has extended its Risc-V reference model and simulator to cover forthcoming vector instructions and to support coverage-driven verification analysis. Called riscvOVPsim, the enhanced version ...